Physical vapor deposition (PVD) is a frequently used processing technique in the manufacture of integrated circuit chips that involves the deposition of a metallic layer on the surface of a silicon wafer. The technique is also known as a sputtering process. In more recently developed advanced semiconductor manufacturing technology, the PVD technique is frequently used to deposit metallic layers such as TiN as anti-reflective coating or barrier layers.
In a typical PVD process, an inert gas such as argon is first ionized in an electrical field producing a plasma of charged gas particles. The particles are then attracted toward a negatively charged source (or target). The energy of these gas particles physically dislodges, or sputters of atoms of the metallic target material. PVD is a versatile technique in that many different materials can be deposited by using an RF or a DC power source.
In a typical PVD process chamber 10, as shown in FIG. 1, major components of the chamber include a stainless steel chamber body 12 that is vacuum tight and is equipped with a pump 16 capable of reducing the chamber pressure to at least 10.sup.-6 m Torr, a pressure gauge 18, a sputter source or target 20, a power supply (not shown), a wafer holder 14 and a clamp ring 22. The sputter source 20 and the wafer holder 14 are positioned facing each other. The target may be a titanium disc when sputtering of TiN is desired. One of such PVD process chamber is commercially available as Endura.RTM. 5500 from Applied Materials, Inc. of Santa Clara, Calif.
The wafer holder 14 is normally a pedestal of a disc shape. In a top surface of the pedestal, metal screws 24 are used as pedestal pins for supporting a wafer 26 at the tips of the screws 24. The pedestal pins allow a gap of approximately 1 mm to be maintained between the wafer 26 and the top surface 28 of the pedestal body 14. The distance is necessary such that a subsequently deposited film, for instance, a TiN layer does not glue the wafer to the pedestal surface 28. A thin TiN layer is frequently used on top of an aluminum-copper film layer as an anti-reflective coating for a subsequent lithography process. In a typical PVD deposition process, a plasma cloud 30 is generated by a cascading ionization reaction in which electrons and ion pairs are formed. For instance, when an electron bumps into an argon atom, it forms an argon ion and another electron. The newly formed electron then collides with another argon atom such that a chain reaction or ionization reaction is started. When the electrons bombard the wafer surface, the surface may be charged to a negative voltage higher than 30 volts.
One of the more important components in a sputter chamber is the clamp ring 22 which serves several functions during a sputter process. For instance, one of the functions is to clamp a wafer to a pedestal heater. The clamp ring holds the wafer in place on the pedestal when a positive gas pressure is applied between the heater and the pedestal such that heat can be efficiently conducted from the heater to the wafer. Another function served by the clamp ring is to allow a predetermined flow of argon to leak from under the wafer into the sputter chamber. A clamp ring is constructed in a circular shape with an oriented cut-out to match a wafer's flat side. A hood portion 32 is built into the clamp ring 22 for shadowing purpose to protect the lip of the clamp ring from being coated by the sputtered metal particles. A plane view of the clamp ring 22 and the hood portion 32 of the clamp ring are shown in FIG. 2.
One other function served by the clamp ring 22, and specifically by the hood portion 32 is the shielding of specific area along the edge of a wafer that should not be covered by sputtered metal particles. A typical area is the alignment marks which are scribed onto a top surface of a wafer for alignment in various process machines and onto various wafer platforms. An alignment mark would not be recognizable in a subsequent lithography process if covered by sputtered metals. The protection of an alignment mark from sputtered metal particles is therefore an important step in a sputtering process.
FIGS. 3A and 3B show a conventional physical vapor deposition chamber with a wafer pedestal in a release and in a process position, respectively. The PVD chamber 40 is constructed of a wafer pedestal 42, a clamp ring 44, an upper chamber shield 46 and a lower chamber shield 48 which are enclosed in chamber wall 50. A clamp shield 52 and an adapter plate 54 for mounting the upper shield 46 and the lower shield 48 thereto are further shown in FIGS. 3A and 3B.
A perspective view of the major components in the PVD chamber 40 is shown in FIG. 4. It should be noted that in this conventional construction of a PVD chamber, the clamp ring 44 is not equipped with an extended hood portion for shielding an edge portion of the wafer or for shielding an alignment mark formed on the wafer.
In a modified conventional PVD chamber 60, as shown in FIGS. 5A and 5B, attempts have been made to shield an edge portion of a wafer by an improved clamp ring 64 and to fix the position of the clamp ring in relation to the wafer 26 by alignment pins 66. In this conventional construction, a modified clamp ring 64 which is equipped with an extended hood portion 70 is used to shield an edge portion 72 of the wafer 26. The modified clamp ring 64 is further equipped with alignment pins 66 which are fixed to an edge 74 of the clamp ring 64. Correspondingly located apertures 62 are provided for positioning the alignment pins 66. The alignment pins 66 and the locating apertures 62 are provided such that the locating pins 66 may enter or exit the locating apertures 62 freely when the clamp ring 64 is lifted up by the wafer pedestal 42 away from the apertures or lowered into the apertures. This is shown in FIGS. 5A and 5B in an release and a process position, respectively.
While the alignment pins 66 utilized in the modified conventional PVD chamber 60 assist in the locating of the clamp ring 64 positioned on top of the wafer pedestal 42, the modified clamp ring 64 does not always function properly to shield alignment marks provided on the wafer surface. For instance, during an upward movement of the wafer pedestal 42 by the upward movement of the elevator 76, the clamp ring 64 and its associated alignment pins 66 are no longer held in place by the locating apertures 62 in the lower chamber shield 68, as shown in FIG. 5B. The movement of the wafer pedestal 42 may cause a shift in position of the clamp ring 64 in relation to the wafer pedestal 42 and the wafer 26 placed on top. As a result, the extended hood portions 70 may no longer shield the alignment marks that were placed directly under the hood portions 70. The subsequent metal sputtering process therefore covers up the alignment marks and cause problems in the subsequent processing step.
It is therefore an object of the present invention to provide an alignment mark shielding ring for use in a sputter chamber that does not have the drawbacks or shortcomings of the conventional clamp rings.
It is another object of the present invention to provide an alignment mark shielding ring for use in a sputter chamber that is effective in shielding alignment marks placed on a top surface of a wafer positioned on a wafer pedestal.
It is a further object of the present invention to provide an alignment mark shielding ring for use in a sputter chamber that can be securely mounted onto a wafer pedestal such that the up-and-down motion of the pedestal does not change the position of the shielding ring.
It is another further object of the present invention to provide an alignment mark shielding ring for use in a sputter chamber that is equipped with extended hood portions for shielding an edge portion of a wafer and with alignment pins for connecting to a wafer pedestal.
It is still another object of the present invention to provide an alignment mark shielding ring for use in a sputter chamber wherein the shielding ring is equipped with alignment pins for joining to locating apertures provided in a wafer pedestal for holding the wafer.
It is yet another object of the present invention to provide a wafer pedestal that is equipped with an alignment mark shielding ring for use in a sputter chamber wherein the pedestal may be mechanically joined to the shielding ring by alignment means such that the up-and-down motion of the pedestal does not affect the alignment of the shielding ring with the wafer positioned on top of the pedestal.
It is still another further object of the present invention to provide a method for shielding a mark on a wafer in a sputter chamber by providing a pedestal that is equipped with apertures in an edge portion for joining with alignment pins provided on a mark shielding ring such that a sputtering process can be carried out with an extended hood portion on the ring covering the mark.